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 February 1997 PRELIMINARY
ML6424*/ML6425* CCIR601 Video Lowpass Filter with Optional Sinx/x Correction
GENERAL DESCRIPTION
The ML6424 is a monolithic BiCMOS Video Lowpass Filter IC, incorporating a 5th order Elliptic (Cauer) lowpass filter, a third order allpass filter, and a 75 coax cable driver. The ML6425 additionally provides sinx/x amplitude correction. These active lowpass filters are available with a 2.75MHz (-2) or a 5.50MHz (-1) cutoff frequency. The input signal can be either AC or DC coupled under the control of the MODE pin. In the DC coupled case, a control pin (RANGE) is provided to allow the inputs to swing down to ground. Internal self clamping is provided for AC coupled signals. The ML6424 and ML6425 are powered by a single 5V supply, and can drive 1VPP into 75 (0.5V to 1.5V), or 2VPP into 150 (0.5 to 2.5V). The maximum output swing from 0.5V to 2.5V allows easy interface to the ML6400 family of A/D converters.
FEATURES
s s s s s s s s s s s s
External or internal input clamping with pulse output for synchronous clamping of multiple filters Frequency tunable with REXT: 10% 0.25dB ripple >40dB attenuation at f > 1.45 x fC (w/o sinx/x) >35dB attenuation at f > 1.45 x fC (with sinx/x) -12dB attenuation at f = 1.23 x fC Group delay distortion: 20ns up to 0.9 x fC <1% peak overshoot and ringing on 2T test pulse 0.5% diff. gain and 0.5 diff. phase typical THD <1% at 3.58 or 4.43MHz Programmable input-output gain of 1x or 2x 5V 5% operation *Some packages Are Obsolete
BLOCK DIAGRAM
+5V GAIN
13 5
VCC
11
VCC
3
VCC
1
VCC
VIN P VIN M
6 7
INPUT CLAMP
+ -
BUF
5TH ORDER LOW PASS
3RD ORDER ALL PASS
SINX/X
+ BUF -
15 VOUT P 16
VOUT M
MODE 12
FILTER BIAS
PULSE 4 I/O
PULSE CONTROL
8 9 10 14 2
RANGE
REXT 10k 1%
GND
GND
GND
Bandwidth Sinx/x
ML6424-1 5.50MHz No
ML6424-2 2.75MHz No
ML6425-1 5.50MHz Yes
ML6425-2 2.75MHz Yes
1
ML6424/ML6425
PIN CONFIGURATION
Package: S16W 16-Pin SOIC
VCC GND VCC PULSE I/O VCC VIN P VIN M RANGE
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
VOUT M VOUT P GND GAIN MODE VCC GND REXT
TOP VIEW
2
ML6424/ML6425
PIN DESCRIPTION
Pin # Name Description Pin # Name Description
1,3, 5,11 2,10, 14 4
VCC GND
Positive supply voltages (4.75V to 5.25V). Ground voltages.
12
MODE
PULSE I/O U/V clamp switch control input/output pin. When MODE is low, U/V clamp control pulse can be applied to this input pin. When MODE is high, the internal circuit generates a U/V clamp control signal to produce an output pulse at this pin. When MODE is floating, do not apply any voltage to this pin since it is internally tied low in this case. (See table below) VIN P, VIN M Input to the filter. The input voltage for the filter is applied to VIN P pin with respect to VIN M pin which is grounded. (With no connection to MODE pin, input signal range should be from VIN = 0.5V to 1.5V when RANGE = Low, VIN = 0V to 1V when RANGE = High). There is a 100A internal current source connected to each of these inputs. Input signal range control when MODE is floating. When RANGE is low, the input signal range is 0.5V to 1.5V, when RANGE is tied high the input signal range is 0V to 1V. Precision resistor to ground that defines the cutoff frequency of the filter. (Typical value = 10k) 10% change in REXT produces a 10% change in fC (Fig. 28).
Input coupling mode control pin. When MODE is low, U/V signal can be applied through an external ac coupling capacitor to VIN P. When MODE is high, Y signal can be applied through an external AC coupling capacitor to VIN P. In this case, an internal circuitry clamps the sinc tip of the video input signal. When MODE is set to mid supply or left floating, input signal can be directly applied to the input without an AC coupling capacitor. Three state gain control pin. GAIN tied low sets the input amplifier gain to 3/4 (0.75) and the output amplifier gain to 4/3 (1.333). When GAIN is tied high, the input amplifier gain is 3/2 (1.5) and the output amplifier gain is 4/3. When GAIN is set to mid supply or left to float, the input amplifier gain is 3/4 and the output gain is 8/3 (2.666). (See table below) The output from the filter is derived from the VOUT P pin with respect to the VOUT M pin which is grounded typically. It can drive 1VPP/75 (0.5V to 1.5V) or 2VPP/150 (0.5V to 2.5V). If the ouput common-mode level needs to be increased, it can be done by raising the potential of VOUT M. In this case, the output is measured from VOUT P with respect to GND.
13
GAIN
6,7
15,16
VOUT P, VOUT M
8
RANGE
9
REXT
MODE Low Float High
INPUT COUPLING AC for U/V DC AC for Y
PULSE Input Internally biased Output
GAIN INPUT INPUT SELECT BUFFER GAIN Low Float 1VPP 1VPP 0.75 0.75
OUTPUT BUFFER GAIN 1.333 2.666
OUTPUT OPTIMIZES
1VPP 2VPP
-- Differential Phase & Gain Noise
Pulse Mode Table
High 1VPP 1.50 1.333 2VPP
Gain Table
3
ML6424/ML6425
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. DC Supply Voltage ........................................ -0.3V to 7V Analog & Digital Inputs/Outputs ................................. -0.3V to VCC + 0.3V Input current per pin .............................. -25mA to 25mA Storage Temperature ................................ -65C to 150C Maximum Junction Temperature ............................ 150C
OPERATING CONDITIONS
Operating temperature range ......................... 0C to 70C Operating supply range ....................................... 5V 5%
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, VCC = 4.75 to 5.25V, TA = Operating Temperature Range (Note 1).
PARAMETER Supply Current Input Current (VIN P, VIN M) Input Current Matching Low Frequency Gain Passband Ripple Differential Gain (RANGE = High) Differential Phase (RANGE = High) Sourcing out of the device Between VIN P and VIN M (tied to GND) VIN = 100mVP-P @ 100kHz 100Hz < fIN < fC VIN: 1.0V 0.5V, @ 3.58 or 4.43MHz VIN: 1.0V 0.5V, @ 3.58 or 4.43MHz 0.5 0 1.7 1.3 1.7 1.3 5.23 2.61 35 30 5.50 2.75 38 33 1 20 45 35 0.8 VCC - 0.8 -1 1 -0.2 -0.25 0.5 0.5 80 CONDITIONS MIN TYP 100 100 3.0 0.0 MAX 150 120 5 0.2 0.25 1 1 1.5 1 2.3 1.9 2.3 1.9 5.78 2.89 UNITS mA A % dB dB % Degree V V mVRMS mVRMS mVRMS mVRMS MHz MHz dB dB % ns mA pF V V A A
Dynamic Input Signal Range (MODE = Float) RANGE = Low RANGE = High Output Noise (GAIN = High) Bw: 30MHz, ML6424-1 Bw: 30MHz, ML6424-2 Bw: 30MHz, ML6425-1 Bw: 30MHz, ML6425-2 Corner Frequency (fC) (0.25dB) ML6424-1 or ML6425-1 ML6424-2 or ML6424-2 Stopband Loss (ML6424-1, -2) Stopband Loss (ML6425-1, -2) Peak Overshoot and Ringing Composite Chroma/Luma Delay Output Short Circuit Current Load Capacitance Logic Input Low (VIL) Logic Input High (VIH) Logic Input Low (IIL) Logic Input High (IIL)
Note 1: Note 2:
fIN > 1.45 x corner frequency fIN > 1.45 x corner frequency 2T, 0.7VP-P pulse TD(subcarrier) - TD(0); fC = 5.5MHz VOUT P to GND while VOUT M = GND VOUT P to GND RANGE RANGE VIN = GND VIN = VCC
Limits are guaranteed by 100% testing, sampling, or correlation with worst case conditions. Digital Inputs: All inputs are high impedance 1A leakage, with MAX input voltage levels of 0.8V from each supply
4
ML6424/ML6425
FUNCTIONAL DESCRIPTION
The ML6424 and ML6425 are monolithic CCIR601 continuous time video filters, designed for broadcast and professional luminance and chrominance antialias and reconstruction applications. They are fabricated using Micro Linear's 1.5, 4 GHz BiCMOS process. The filter incorporates an input amplifier, programmable gain of 1x or 2x set by the GAIN pin, a fifth order lowpass filter, a third order allpass filter, and an output amplifier capable of driving 75 to ground. The ML6425 provides sinx/x equalization. The ML6424-1 is intended for application as luminance antialias processing, the ML6424-2 for chrominance antialias, the ML6425-1 for luma reconstruction, and the ML6425-2 for chroma reconstruction. Input signals can be applied either through an AC coupling capacitor (MODE = High/Low) or directly to the input pin (MODE = float). With MODE = High, Y-Channel signal can be applied to the input and the PULSE I/O pin generates a clamping pulse for the U/V channel. When MODE = Low, U/V channel signal can be applied to the input. In this case, the PULSE I/O pin can take the pulse signal generated from the PULSE I/O pin of the other chip in the Y-channel. In the case of direct coupling, RANGE should be adjusted according to the input signal range. When RANGE is low, the input signal range is 0.5V to 1.5V. When the input signal goes down to 0V, RANGE should be tied high. In this case, an offset is added to the input so that the filter can process the 0V DC level. The output amplifier is designed to drive up to 20mA peak into a 75 load, or 17mA peak into a 150 load. Load resistance less than 75 and/or output voltage above 1.5V into 75 (2.5V into 150) may cause signal distortion. Good high frequency decoupling is required between each power supply pin and ground, otherwise oscillations and/or excessive crosstalk may occur.
1F Y 75
6
ML6424-1
VIN P VIN M Y 75
1F
6
ML6424-1
VIN P VIN M
7
7
+5V 12 MODE
+5V 12 MODE
4
PULSE I/O
4
PULSE I/O
1F U 75
6
ML6424-2
VIN P VIN M U 75
1F
6
ML6424-2
VIN P VIN M
7
7
12 MODE
12 MODE
4
PULSE I/O
4
PULSE I/O
1F V 75
6
ML6424-2
VIN P VIN M V 75
1F
6
ML6424-2
VIN P VIN M
7
7
12 MODE
12 MODE
4
PULSE I/O
4
PULSE I/O
Figure 1. YUV Filter with Sync on Y Input and Auto Clamp On
Figure 2. YUV Filter with External Sync for U/V
5
ML6424/ML6425
1F Y 75
6
ML6424-1
VIN P VIN M
7
+5V 12 MODE
4
PULSE I/O
1F C 75
6
ML6424-2
VIN P VIN M
7
12 MODE
4
PULSE I/O
Figure 3. Y/C Filter
6
ML6424/ML6425
ML6424-1 RESPONSE CURVES
+10 0 -10 -20 +0.3 +0.2 +0.1 0.0 AMPLITUDE (dB) 1 FREQUENCY (MHz) 10 50 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 100k 3M FREQUENCY (Hz) 6M
AMPLITUDE (dB)
-30 -40 -50 -60 -70 -80 -90 0.1
Figure 4. Amplitude vs Frequency
Figure 5. Amplitude vs Frequency
0 0--
PHASE (45/div)
PHASE (10/div) 500k FREQUENCY (Hz)
500k FREQUENCY (Hz)
5.5M
5.5M
Figure 6. Phase vs Linear Frequency
Figure 7. Deviation from Linear Phase
380
360
GROUP DELAY (ns)
340
320
300
280 100k 3M FREQUENCY (Hz) 6M
Figure 8. Group Delay vs Frequency
7
ML6424/ML6425
ML6424-2 RESPONSE CURVES
+10 0 -10
AMPLITUDE (dB)
+0.4 +0.3 +0.2 +0.1
AMPLITUDE (dB)
-20 -30 -40 -50 -60 -70 -80 -90 0.1 1 FREQUENCY (MHz) 10 30
0.0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 100k 1.5M FREQUENCY (Hz) 3M
Figure 9. Amplitude vs Frequency
Figure 10. Amplitude vs Frequency
0
0
PHASE (45/div)
PHASE (5/div)
200k FREQUENCY (Hz)
200k FREQUENCY (Hz)
2.2M
2.2M
Figure 11. Phase vs Linear Frequency
Figure 12. Deviation from Linear Phase
730
690
GROUP DELAY (ns)
650
610
570
530 100k 1.5M FREQUENCY (Hz) 3M
Figure 13. Group Delay vs Frequency
8
ML6424/ML6425
ML6425-1 RESPONSE CURVES
20 10 0 3.0 RELATIVE AMPLITUDE (dB) +4dB
RELATIVE AMPLITUDE (dB)
-10 -20 -30 -40 -50 -60 -70 -80 100k 1M FREQUENCY (Hz) 10M
2.0
1.0
0
0.1
1
2 FREQUENCY (MHz)
3
Figure 14. Amplitude vs Frequency
Figure 15. Amplitude vs Frequency
0
0
PHASE (45/div)
PHASE (10/div) 500k FREQUENCY (Hz)
500k FREQUENCY (Hz)
5.5M
5.5M
Figure 16. Phase vs Frequency
Figure 17. Deviation from Linear Phase
410 390 370 GROUP DELAY (ns) 350 330 310 290 270 250 230 210 100k 3.5M FREQUENCY (Hz) 6M
Figure 18. Group Delay vs Frequency
9
ML6424/ML6425
ML6425-2 RESPONSE CURVES
20 10 0 RELATIVE AMPLITUDE (dB) AMPLITUDE (dB) -10 -20 -30 -40 -50 -60 -70 -80 100k 1M FREQUENCY (Hz) 10M 100k FREQUENCY (Hz) 6.0M 0 3 4
2
1
Figure 19. Amplitude vs Frequency
Figure 20. Amplitude vs Frequency
0
PHASE (45/div)
PHASE (5/div)
200k FREQUENCY (Hz)
2.2M
200k FREQUENCY (Hz)
2.2M
Figure 21. Phase vs Linear Frequency
Figure 22. Deviation from Linear vs Phase
630
6
GROUP DELAY (20ns/div)
CUT OFF FREQUENCY (Hz)
5
ML6424/25-1
4
3
ML6424/25-2
100k FREQUENCY (Hz) 3.0M
2
8
9
10 REXT (k)
11
12
Figure 23. Group Delay vs Frequency
Figure 24. Frequency vs REXT
10
ML6424/ML6425
ML6425-2 RESPONSE CURVES
AMPLITUDE (0.5V/div.)
INPUT FROM DAC OUTPUT FILTER OUTPUT
TIME (500ns/div.)
Figure 25. Transient Response
11
ML6424/ML6425
PHYSICAL DIMENSIONS inches (millimeters)
Package: S16W 16-Pin Wide SOIC
0.400 - 0.414 (10.16 - 10.52)
16
0.291 - 0.301 0.398 - 0.412 (7.39 - 7.65) (10.11 - 10.47)
PIN 1 ID
1 0.024 - 0.034 (0.61 - 0.86) (4 PLACES)
0.050 BSC (1.27 BSC)
0.095 - 0.107 (2.41 - 2.72)
0 - 8
0.090 - 0.094 (2.28 - 2.39)
0.012 - 0.020 (0.30 - 0.51)
SEATING PLANE
0.005 - 0.013 (0.13 - 0.33)
0.022 - 0.042 (0.56 - 1.07)
0.009 - 0.013 (0.22 - 0.33)
ORDERING INFORMATION
PART NUMBER ML6424-1 ML6424-2 ML6425-1 ML6425-2 FREQ 5.5 2.75 5.5 2.75 SIN X/X NO NO YES YES TEMPERATURE RANGE 0C to 70C 0C to 70C 0C to 70C 0C to 70C PACKAGE 16-Pin SOIC (S16W) (Obsolete) 16-Pin SOIC (S16W) 16-Pin SOIC (S16W) (Obsolete) 16-Pin SOIC (S16W)
(c) Micro Linear 1997 is a registered trademark of Micro Linear Corporation Products described herein may be covered by one or more of the following patents: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761, 5,594,376, 5,592,128. Other patents are pending.
Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design. Micro Linear does not assume any liability arising out of the application or use of any product described herein, neither does it convey any license under its patent right nor the rights of others. The circuits contained in this data sheet are offered as possible applications only. Micro Linear makes no warranties or representations as to whether the illustrated circuits infringe any intellectual property rights of others, and will accept no responsibility or liability for use of any application herein. The customer is urged to consult with appropriate legal counsel before deciding on a particular application.
2092 Concourse Drive San Jose, CA 95131 Tel: 408/433-5200 Fax: 408/432-0295
DS6424_25-01
12


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